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A Methodology for Design and Evaluation of Redundancy Allocation Algorithms
Napa Valley, California April 25-April 29
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.2004.129925122nd IEEE VLSI Test Symposium
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S. Shoukourian, V. A. Vardanian, Y. Zorian, "A Methodology for Design and Evaluation of Redundancy Allocation Algorithms," VLSI Test Symposium, IEEE, pp. 249, 22nd IEEE VLSI Test Symposium, 2004.
 
 
BibTex
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@article{ 10.1109/VTEST.2004.1299251,
author = {S. Shoukourian and V. A. Vardanian and Y. Zorian},
title = {A Methodology for Design and Evaluation of Redundancy Allocation Algorithms},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {2004},
issn = {1093-0167},
pages = {249},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.2004.1299251},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - VLSI Test Symposium, IEEE
TI - A Methodology for Design and Evaluation of Redundancy Allocation Algorithms
SN - 1093-0167
SP
EP
A1 - S. Shoukourian,
A1 - V. A. Vardanian,
A1 - Y. Zorian,
PY - 2004
KW - null
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
S. Shoukourian, Virage Logic, Fremont, CA
V. A. Vardanian, Virage Logic, Fremont, CA
Y. Zorian, Virage Logic, Fremont, CA
A methodology for design and evaluation of redundancy allocation algorithms based on prime algorithms is proposed for memory devices with spare elements. The methodology can be applied to any memory device with spare elements. It allows the design of simple but effective Built-in Redundancy Allocation (BIRA) algorithms working "on-the-fly" with BIST. The methodology allows also reasonable trade-off between repair coverage and hardware/time complexity during the implementation.
A basic toolset for design and evaluation of BIRA algorithms based on the proposed methodology is developed and preliminary results of experiments on the application of the tool for Self-Test and Repair (STAR) type SRAM memories are adduced.
Citation:
S. Shoukourian, V. A. Vardanian, Y. Zorian, "A Methodology for Design and Evaluation of Redundancy Allocation Algorithms," vts, pp.249, 22nd IEEE VLSI Test Symposium, 2004
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