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Clock Synchronization in Wireless Distributed Embedded Applications
Hakodate, Hokkaido, Japan May 15-May 16
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/WSTFES.2003.1201371IEEE Workshop on Software Technologie ...
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Y. S. Hong, Dongguk University
J. H. No, Dongguk University
Keeping distributed clocks closely synchronized is one of the basic requirements in wireless embedded applications. In the context of wireless applications, a clock synchronization protocol must tolerate message losses and should have a low communication overhead.
The purpose of this paper is to present a clock synchronization protocol for distributed embedded systems in wireless environments. Our protocol adopts the master/slave structure based on a time transmission protocol and uses a drift correction algorithm for clock synchronization. The master node broadcasts synchronization messages through access point. The slave node estimates the master clock using the time transmission protocol and adjusts its virtual clock based on the continuous clock synchronization. Another advantage of the proposed protocol is that it uses a linear number of messages by transmitting one synchronization message in each resynchronization round and tolerates message losses.
The protocol is implemented and tested in a Windows NT and a WinCE. Its measurements indicate that the PC node and PDAs can be kept synchronized within the deviation bound of 8 milliseconds.
Index Terms:
clock synchronization, distributed embedded system, wireless communication, time transmission protocol, master/slave structure
Citation:
Y. S. Hong, J. H. No, "Clock Synchronization in Wireless Distributed Embedded Applications," wstfes, pp.101, IEEE Workshop on Software Technologies for Future Embedded Systems, 2003
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