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Three Decades of HDLs: Part II, Conlan Through Verilog
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.156158July/September 1992 (vol. 9 no. 3) pp. 54-63
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For pt.1 see ibid., June 1992. Current hardware description languages (HDLs) benefit from the efforts of designers of VHDLs in the mid-1970s through the late 1980s. The developers of four HDLs discuss their motivations and their views of how their work relates to the present very-high-speed integrated circuit HDLs (VHDLs). The languages discussed are Conlan, ADLIB/SABLE, Zeus, and Verilog.

Citation:
Dominique Borrione, Robert Piloty, Dwight Hill, Karl J. Lieberherr, Philip Moorby, "Three Decades of HDLs: Part II, Conlan Through Verilog," IEEE Design and Test of Computers, vol. 9, no. 3, pp. 54-63, July 1992, doi:10.1109/54.156158
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