Failure analysis is an important part of IC manufacturing. Identifying failure mechanisms and obtaining defect statistics allow manufacturers to continuously improve the fabrication process and optimize the testing process. Because of increasing design densities, decreasing feature sizes, flip-chip packaging, and chemical-mechanical polishing, failure analysis must turn increasingly to electrical or test-based methods of identifying defect locations. Algorithmic fault diagnosis aids the failure analysis process by reducing a very large set of modeled faults to a small number of candidate faults. The algorithm maps these faults to physical locations, which the failure analysis engineer then can examine.