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Concurrent Checking of Clock Signal Correctness
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.735926October-December 1998 (vol. 15 no. 4) pp. 42-48
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This paper presents a novel concept for concurrently checking the correctness of signals of clock distribution networks of synchronous systems. A VLSI circuitry is then proposed that, based on such a concept, performs the concurrent checking of such signals with respect to permanent and temporary (i.e., transient and intermittent) faults (permanently or temporary) changing their waveforms with respect to those expected in the fault-free case. Such a circuitry is in turn self-checking with respect to its possible permanent, as well as temporary, internal, realistic faults.
Index Terms:
Concurrent checking, clock signals, temporary faults, self-checking circuits
Citation:
Cecilia Metra, Michele Favalli, Bruno Riccò, "Concurrent Checking of Clock Signal Correctness," IEEE Design and Test of Computers, vol. 15, no. 4, pp. 42-48, Oct.-Dec. 1998, doi:10.1109/54.735926
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