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RT-Level ITC'99 Benchmarks and First ATPG Results
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.867894July-September 2000 (vol. 17 no. 3) pp. 44-53
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Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, "RT-Level ITC'99 Benchmarks and First ATPG Results," IEEE Design and Test of Computers, vol. 17, no. 3, pp. 44-53, July-September, 2000.
 
 
BibTex
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@article{ 10.1109/54.867894,
author = {Fulvio Corno and Matteo Sonza Reorda and Giovanni Squillero},
title = {RT-Level ITC'99 Benchmarks and First ATPG Results},
journal ={IEEE Design and Test of Computers},
volume = {17},
number = {3},
issn = {0740-7475},
year = {2000},
pages = {44-53},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.867894},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - MGZN
JO - IEEE Design and Test of Computers
TI - RT-Level ITC'99 Benchmarks and First ATPG Results
IS - 3
SN - 0740-7475
SP44
EP53
EPD - 44-53
A1 - Fulvio Corno,
A1 - Matteo Sonza Reorda,
A1 - Giovanni Squillero,
PY - 2000
VL - 17
JA - IEEE Design and Test of Computers
ER -
 

New design flows require reducing work at the gate level and perfoming most activities before the synthesis step, including evaluatation of testability of circuits. We propose a suite of RT-level benchmarks that help improve research in high-level ATPG tools. First results on the benchmarks obtained with our prototype tool show the feasibility of the approach.

Citation:
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, "RT-Level ITC'99 Benchmarks and First ATPG Results," IEEE Design and Test of Computers, vol. 17, no. 3, pp. 44-53, July-Sept. 2000, doi:10.1109/54.867894
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