loading...
Power-Driven Challenges in Nanometer Design
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.970420November/December 2001 (vol. 18 no. 6) pp. 12-22
 This Article 
 
Buy PURCHASE ARTICLE: $19
PDF
HTML
Buy IEEE Xplore Subscribers
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
ASCII Text
x 
 
Dennis Sylvester, Himanshu Kaul, "Power-Driven Challenges in Nanometer Design," IEEE Design and Test of Computers, vol. 18, no. 6, pp. 12-22, November/December, 2001.
 
 
BibTex
x
 
@article{ 10.1109/54.970420,
author = {Dennis Sylvester and Himanshu Kaul},
title = {Power-Driven Challenges in Nanometer Design},
journal ={IEEE Design and Test of Computers},
volume = {18},
number = {6},
issn = {0740-7475},
year = {2001},
pages = {12-22},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.970420},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Power-Driven Challenges in Nanometer Design
IS - 6
SN - 0740-7475
SP12
EP22
EPD - 12-22
A1 - Dennis Sylvester,
A1 - Himanshu Kaul,
PY - 2001
VL - 18
JA - IEEE Design and Test of Computers
ER -
 

Addressing fundamental challenges to designing high-performance ICs in nanometer-scale technologies, the authors advocate a flexible approach to limiting both dynamic and static power. They recommend global-signaling strategies to curb communication power requirements and thermal management techniques to ease the burden on packaging.

Citation:
Dennis Sylvester, Himanshu Kaul, "Power-Driven Challenges in Nanometer Design," IEEE Design and Test of Computers, vol. 18, no. 6, pp. 12-22, Nov./Dec. 2001, doi:10.1109/54.970420
Usage of this product signifies your acceptance of the Terms of Use.