loading...
The Architecture of an FPGA-Style Programmable Fuzzy Logic Controller Chip
Canberra, Australia January 31-February 03
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ACAC.2000.8243225th Australasian Computer Architectur ...
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
T. Lund, University of Canberra
A. Torralba, Escuela Superior de Ingenieros de Sevilla
R.G. Carvajal, Escuela Superior de Ingenieros de Sevilla
In the search for a fuzzy logic equivalent of the FPGA, the authors have developed the design for a programmable fuzzy logic controller chip which can accept up to 4 inputs, provide up to 12 programmable membership functions to fuzzify those inputs, and provide up to 8 programmable singleton values from which an output can be synthesized. Up to 64 rules can be evaluated simultaneously. The analogue modules which perform the fuzzification, rule evaluation and defuzzification operations are interconnected in a programmable fashion, modeled on the structure of FPGAs. This design will require an area of about 6mm2 in 0.8mm CMOS technology and draw about 9mA.
Citation:
T. Lund, A. Torralba, R.G. Carvajal, "The Architecture of an FPGA-Style Programmable Fuzzy Logic Controller Chip," acac, pp.51, 5th Australasian Computer Architecture Conference, 2000
Usage of this product signifies your acceptance of the Terms of Use.