A Power-Aware Algorithm for the Design of Reconfigurable Hardware during High Level Placement

University of Edinburgh, Scotland, United Kingdom August 05-August 08

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http://doi.ieeecomputersociety.org/10.1109/AHS.2007.15

Second NASA/ESA Conference on Adaptiv ...

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	Wing On Fung, Tughrul Arslan, "A Power-Aware Algorithm for the Design of Reconfigurable Hardware during High Level Placement," Adaptive Hardware and Systems, NASA/ESA Conference on, pp. 499-503, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007.

	BibTex	x
	@article{ 10.1109/AHS.2007.15, author = {Wing On Fung and Tughrul Arslan}, title = {A Power-Aware Algorithm for the Design of Reconfigurable Hardware during High Level Placement}, journal ={Adaptive Hardware and Systems, NASA/ESA Conference on}, volume = {0}, year = {2007}, isbn = {0-7695-2866-X}, pages = {499-503}, doi = {http://doi.ieeecomputersociety.org/10.1109/AHS.2007.15}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Adaptive Hardware and Systems, NASA/ESA Conference on TI - A Power-Aware Algorithm for the Design of Reconfigurable Hardware during High Level Placement SN - 0-7695-2866-X SP499 EP503 A1 - Wing On Fung, A1 - Tughrul Arslan, PY - 2007 KW - null VL - 0 JA - Adaptive Hardware and Systems, NASA/ESA Conference on ER -

Wing On Fung, University of Edinburgh, King's Buildings, UK

Tughrul Arslan, Institute for System Level Integration2, The Alba Centre, Alba Campus, UK

The popularity of reconfigurable logic devices and portable hardware demands ever increasingly power saving schemes for low power designs. This paper looks at the CAD design process of reconfigurable devices and presents a novel method to gain power savings during the placement stage of the CAD flow. The proposed system modeled the number of switches used in the circuit and employed simulated annealing algorithm to reduce the overall routing power. The system was tested against 8 large benchmark circuits. It was able to achieve a routing power saving of up to 18% compared with cases without modeling the switches.

Citation:

Wing On Fung, Tughrul Arslan, "A Power-Aware Algorithm for the Design of Reconfigurable Hardware during High Level Placement," ahs, pp.499-503, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

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