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A Reconfigurable Arithmetic Data-path Based On Regular Interconnection
University of Edinburgh, Scotland, United Kingdom August 05-August 08
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AHS.2007.16Second NASA/ESA Conference on Adaptiv ...
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Sotiris, National Technical University of Athens
George Economakos, National Technical University of Athens
Kiamal Pekmestzi, National Technical University of Athens
In this paper a novel coarse grained reconfigurable arithmetic unit (RAU) is introduced. The RAU?s design is based on a technique that inlines flexibility into custom Carry-Save-Arithmetic (CSA) circuits exploiting a stable and canonical interconnection scheme. The reconfigurable architecture prototype is presented. Two mapping strategies of DSP algorithms onto the proposed unit, are also analyzed. Experimental results report an average latency reduction of 32.63% and of 40% compared with datapaths structured by primitive computational resources, using the first and the second mapping strategy respectively.
Citation:
Sotiris , George Economakos, Kiamal Pekmestzi, "A Reconfigurable Arithmetic Data-path Based On Regular Interconnection," ahs, pp.342-349, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
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