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An Analysis Method with Failure Scenario Matrix for Specifying Unexpected Obstacles in Embedded Systems
Taipei, Taiwan December 15-December 17
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/APSEC.2005.3012th Asia-Pacific Software Engineerin ...
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Toshiro Mise, Matsushita Electoric Works System Solutions Co., Ltd.
Masaaki Hashimoto, Kyushu Institute of Technology
Keiichi Katamine, Kyushu Institute of Technology
Yasufumi Shinyashiki, Matsushita Electoric Works, Ltd.
Naoyasu Ubayashi, Kyushu Institute of Technology
Takako Nakatani, S-Lagoon Co., Ltd.
This paper describes an analysis method with failure scenario matrix for specifying unexpected obstacles in order to improve the quality of embedded systems. Although embedded software has become increasingly large in scale and complexity, companies are requiring the software to be developed within shorter periods of time. Therefore, the quality of the software is bound to suffer. This problem is one of the most serious concerns in a coming age of ubiquitous embedded systems. In order to improve the quality, it is very important to specify the forbidden behavior of embedded systems. The forbidden behavior of unexpected obstacles is analyzed by using a matrix and scenarios. This paper provides a detailed description of the analysis method used, in particular the cause, phenomenon, and goal in the scenario, relating them to each other by using a matrix.
Citation:
Toshiro Mise, Masaaki Hashimoto, Keiichi Katamine, Yasufumi Shinyashiki, Naoyasu Ubayashi, Takako Nakatani, "An Analysis Method with Failure Scenario Matrix for Specifying Unexpected Obstacles in Embedded Systems," apsec, pp.447-456, 12th Asia-Pacific Software Engineering Conference (APSEC'05), 2005
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