loading...
An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation
Montpellier, France June 25-June 27
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARITH.2007.1018th IEEE Symposium on Computer Arith ...
 This Article 
 
Buy PURCHASE ARTICLE: $19
PDF
HTML
Buy IEEE Xplore Subscribers
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
ASCII Text
x 
 
Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto, "An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation," Computer Arithmetic, IEEE Symposium on, pp. 97-104, 18th IEEE Symposium on Computer Arithmetic (ARITH '07), 2007.
 
 
BibTex
x
 
@article{ 10.1109/ARITH.2007.10,
author = {Jean-Luc Beuchat and Masaaki Shirase and Tsuyoshi Takagi and Eiji Okamoto},
title = {An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation},
journal ={Computer Arithmetic, IEEE Symposium on},
volume = {0},
year = {2007},
issn = {1063-6889},
pages = {97-104},
doi = {http://doi.ieeecomputersociety.org/10.1109/ARITH.2007.10},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Computer Arithmetic, IEEE Symposium on
TI - An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation
SN - 1063-6889
SP97
EP104
A1 - Jean-Luc Beuchat,
A1 - Masaaki Shirase,
A1 - Tsuyoshi Takagi,
A1 - Eiji Okamoto,
PY - 2007
KW - Tate pairing
KW - nT pairing
KW - characteristic three
KW - elliptic curve
KW - hardware accelerator
KW - FPGA.
VL - 0
JA - Computer Arithmetic, IEEE Symposium on
ER -
 
Jean-Luc Beuchat, University of Tsukuba, Japan
Masaaki Shirase, Future University-Hakodate, Japan
Tsuyoshi Takagi, Future University-Hakodate, Japan
Eiji Okamoto, University of Tsukuba, Japan
In this paper, we propose a modified ?T pairing algorithm in characteristic three which does not need any cube root extraction. We also discuss its implementation on a low cost platform which hosts an Altera Cyclone II FPGA device. Our pairing accelerator is ten times faster than previous known FPGA implementations in characteristic three.
Index Terms:
Tate pairing, nT pairing, characteristic three, elliptic curve, hardware accelerator, FPGA.
Citation:
Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto, "An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation," arith, pp.97-104, 18th IEEE Symposium on Computer Arithmetic (ARITH '07), 2007
Usage of this product signifies your acceptance of the Terms of Use.