A multi-sender asynchronous extension to the AER protocol

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http://doi.ieeecomputersociety.org/10.1109/ARVLSI.1995.515618

16th Conference on Advanced Research ...

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	ASCII Text	x
	J. Lazzaro, J. Wawrzynek, "A multi-sender asynchronous extension to the AER protocol," Advanced Research in VLSI, Conference on, pp. 158, 16th Conference on Advanced Research in VLSI (ARVLSI'95), 1995.

	BibTex	x
	@article{ 10.1109/ARVLSI.1995.515618, author = {J. Lazzaro and J. Wawrzynek}, title = {A multi-sender asynchronous extension to the AER protocol}, journal ={Advanced Research in VLSI, Conference on}, volume = {0}, year = {1995}, isbn = {0-8186-7047-9}, pages = {158}, doi = {http://doi.ieeecomputersociety.org/10.1109/ARVLSI.1995.515618}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Advanced Research in VLSI, Conference on TI - A multi-sender asynchronous extension to the AER protocol SN - 0-8186-7047-9 SP EP A1 - J. Lazzaro, A1 - J. Wawrzynek, PY - 1995 KW - neural chips; protocols; multi-sender extension; AER; address-event representation; asynchronous point-to-point communications protocol; silicon neural systems VL - 0 JA - Advanced Research in VLSI, Conference on ER -

J. Lazzaro, Comput. Sci. Div., California Univ., Berkeley, CA, USA

J. Wawrzynek, Comput. Sci. Div., California Univ., Berkeley, CA, USA

The address-event representation (AER) is an asynchronous point-to-point communications protocol for silicon neural systems. This paper describes an extension of the AER protocol that allows multiple AER senders to share a common bus. A fully-functional silicon implementation of the extended protocol is described, as well as a functional board-level system of several of these chips sharing a common bus.

Index Terms:

neural chips; protocols; multi-sender extension; AER; address-event representation; asynchronous point-to-point communications protocol; silicon neural systems

Citation:

J. Lazzaro, J. Wawrzynek, "A multi-sender asynchronous extension to the AER protocol," arvlsi, pp.158, 16th Conference on Advanced Research in VLSI (ARVLSI'95), 1995

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