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Signal Delay in Coupled, Distributed RC Lines in the Presence of Temporal Proximity
Ann Arbor, MI September 15-September 16
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARVLSI.1997.63484417th Conference on Advanced Research ...
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V. Chandramouli, University of Michigan
Karem A. Sakallah, University of Michigan
Ayman I. Kayssi, American University of Beirut
With improvements in technology, accurate delay modeling of interconnects is becoming increasingly important. Due to decreasing feature sizes, the spacing between the signal lines is also decreasing. Consequently, the switching activities on the neighboring lines can have a significant impact on the delay of the line of interest, and can no longer be ignored. Accurate modeling of this phenomenon, which we call the proximity effect, is the subject of this paper. This is similar to the state-dependency of logic gate delays, where signal delay can be affected by the switching activities on the side inputs of a gate. We describe an efficient and accurate delay computation method using precomputed interconnect moments that treats the coupled lines as uniform, distributed RC lines and does not make any lumped approximations. This allows the proposed delay model to be used in a timing analysis tool operating over both gate and interconnect domains while accounting for state-dependency.
Index Terms:
Coupled interconnects, Interconnect delay, Moment matching, Distributed lines, Proximity effects
Citation:
V. Chandramouli, Karem A. Sakallah, Ayman I. Kayssi, "Signal Delay in Coupled, Distributed RC Lines in the Presence of Temporal Proximity," arvlsi, pp.32, 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997
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