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MOVIE: A Building Block for the Design of Real Time Simulator of Moving Pictures Compression Algorithms
Strasbourg, France July 24-July 26
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.1995.5229231995 IEEE International Conference on ...
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Ronan Barzic, Christian Bouville, Francois Charot, Gwendal Le Fol, Pascal Lemonnier, Charles Wagner, "MOVIE: A Building Block for the Design of Real Time Simulator of Moving Pictures Compression Algorithms," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 193, 1995 IEEE International Conference on Application-Specific Array Processors (ASAP'95), 1995.
 
 
BibTex
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@article{ 10.1109/ASAP.1995.522923,
author = {Ronan Barzic and Christian Bouville and Francois Charot and Gwendal Le Fol and Pascal Lemonnier and Charles Wagner},
title = {MOVIE: A Building Block for the Design of Real Time Simulator of Moving Pictures Compression Algorithms},
journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on},
volume = {0},
year = {1995},
issn = {1063-6862},
pages = {193},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.1995.522923},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
TI - MOVIE: A Building Block for the Design of Real Time Simulator of Moving Pictures Compression Algorithms
SN - 1063-6862
SP
EP
A1 - Ronan Barzic,
A1 - Christian Bouville,
A1 - Francois Charot,
A1 - Gwendal Le Fol,
A1 - Pascal Lemonnier,
A1 - Charles Wagner,
PY - 1995
KW - image compression
KW - special-purpose architecture
KW - systolic architecture
KW - real-time simulation
VL - 0
JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
ER -
 
Ronan Barzic, CCETT
Francois Charot, IRISA,Campus de Beaulieu
Gwendal Le Fol, IRISA,Campus de Beaulieu
Pascal Lemonnier, IRISA,Campus de Beaulieu
Charles Wagner, IRISA,Campus de Beaulieu
This paper shows how real-time simulator of moving pictures compression algorithms can be rapidly assembled using a basic building block, here called MOVIE (MOdule for VIdeo Experimentation). The internal architecture of the MOVIE VLSI chip can be compared to a small systolic machine made of a 32-bit I/O processor, a reduced linear array of 16-bit computation processors and data video input/output mechanisms. Externally, the chip is provided with four 16-bit bidirectional data ports and three 16-bit bidirectional data video port. Several MOVIE chips can be easily clustered to allow the size of the linear array of computation processors to be increased. The MOVIE chip is fully programmable in a high level language in order to make program developments easier.
Index Terms:
image compression, special-purpose architecture, systolic architecture, real-time simulation
Citation:
Ronan Barzic, Christian Bouville, Francois Charot, Gwendal Le Fol, Pascal Lemonnier, Charles Wagner, "MOVIE: A Building Block for the Design of Real Time Simulator of Moving Pictures Compression Algorithms," asap, pp.193, 1995 IEEE International Conference on Application-Specific Array Processors (ASAP'95), 1995
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