M.I. Patel, Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
N. Ranganathan, Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
In this paper, we describe a VLSI system architecture for real-time intelligent decision making. The architecture integrates the adaptability of a backpropagation based neural network and the decision making ability of a rule based fuzzy expert system on a chip. The intelligent decision making system consists of a back-propagation based neural network for adaptive learning and a rule-based fuzzy expert system for decision making. Both the neural network and the expert system are realized as linear systolic arrays. Thus, the entire system can be implemented in VLSI with a few basic cells. The architecture exploits the principles of pipelining and parallelism to the maximum possible extent in order to achieve high speed and throughput. The proposed hardware can yield a real-time decision every 5ns based on a 200 MHz clock. Currently, a prototype CMOS VLSI chip implementing the proposed architecture is being built and verified.
Index Terms:
VLSI; expert systems; systolic arrays; backpropagation; neural nets; CMOS integrated circuits; real-time systems; VLSI system architecture; real-time intelligent decision making; backpropagation based neural network; rule based fuzzy expert system; adaptive learning; linear systolic arrays; real-time decision; CMOS VLSI chip
Citation:
M.I. Patel, N. Ranganathan, "A VLSI System Architecture For Real-Time Intelligent Decision Making," asap, pp.221, 1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96), 1996
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