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A Novel Sequencer Hardware for Application Specific Computing
Zurich, SWITZERLAND July 14-July 16
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.1997.6068441997 IEEE International Conference on ...
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Reiner W. Hartenstein, University of Kaiserslautern
Jürgen Becker, University of Kaiserslautern
Michael Herz, University of Kaiserslautern
Ulrich Nageldinger, University of Kaiserslautern
This paper introduces a powerful novel sequencer for controlling computational machines and for structured DMA (direct memory access) applications. It is mainly focused on applications using 2-dimensional memory organization, where most inherent speed-up is obtained thereof. A classification scheme of computational sequencing patterns and storage schemes is derived. In the context of application specific computing the paper illustrates its usefulness especially for data sequencing - recalling examples hereafter published earlier, as far as needed for completeness. The paper also discusses, how the new sequencer hardware provides substantial speed-up compared to traditional sequencing hardware use.
Citation:
Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger, "A Novel Sequencer Hardware for Application Specific Computing," asap, pp.392, 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'97), 1997
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