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Polynomial Evaluation on Multimedia Processors
San Jose, California July 17-July 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2002.103072513th IEEE International Conference on ...
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Julio Villalba, Gerardo Bandera, Mario A. Gonzalez, Javier Hormigo, Emilio L. Zapata, "Polynomial Evaluation on Multimedia Processors," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 265, 13th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'02), 2002.
 
 
BibTex
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@article{ 10.1109/ASAP.2002.1030725,
author = {Julio Villalba and Gerardo Bandera and Mario A. Gonzalez and Javier Hormigo and Emilio L. Zapata},
title = {Polynomial Evaluation on Multimedia Processors},
journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on},
volume = {0},
year = {2002},
issn = {1063-6862},
pages = {265},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.2002.1030725},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
TI - Polynomial Evaluation on Multimedia Processors
SN - 1063-6862
SP
EP
A1 - Julio Villalba,
A1 - Gerardo Bandera,
A1 - Mario A. Gonzalez,
A1 - Javier Hormigo,
A1 - Emilio L. Zapata,
PY - 2002
KW - null
VL - 0
JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
ER -
 
Julio Villalba, University of Malaga
Gerardo Bandera, University of Malaga
Mario A. Gonzalez, University of Malaga
Javier Hormigo, University of Malaga
Emilio L. Zapata, University of Malaga
In this paper we deal with the polynomial evaluation based on new processor architectures for multimedia applications. We introduce some algorithms to take advantage of the new attributes on multimedia processors, such as VLIW and SIMD architectures. Algorithms to support the polynomial evaluation based only in addition/shift operations and other different algorithms with MAC instructions are analyzed and tailored to subword parallelism units of the new processors. Both potential instruction-level and machine-level parallelism are fully exploited through concurrent use of all functional units.
Citation:
Julio Villalba, Gerardo Bandera, Mario A. Gonzalez, Javier Hormigo, Emilio L. Zapata, "Polynomial Evaluation on Multimedia Processors," asap, pp.265, 13th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'02), 2002
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