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High Radix Addition Via Conditional Charge Transport in Single Electron Tunneling Technology
Samos, Greece July 23-July 25
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2005.392005 IEEE International Conference on ...
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Cor Meenderinck, Computer Engineering Lab Delft University of Technology Delft, The Netherlands
Sorin Cotofana, Computer Engineering Lab Delft University of Technology Delft, The Netherlands
Casper Lageweg, Computer Engineering Lab Delft University of Technology Delft, The Netherlands

This paper investigates the implementation of high radix addition based on the Electron Counting logic design style in Single Electron Tunneling (SET) Technology. A previous proposal for such an adder assumed the presence of a conditional charge movement (MCke) block which was only described as a black box. First, this paper proposes two possible MCke block implementations, each of which is described in detail and validated by means of simulation. Second, one of the proposed MCke implementations is utilized in the design of a 6-bit radix-8 adder. The resulting adder circuit is verified by simulation and evaluation indicated that it requires 187 circuit elements, has a delay of 4.15 ns (assuming an error probability Perror = 10^{-8}), and a consumed energy of 224 meV.

Citation:
Cor Meenderinck, Sorin Cotofana, Casper Lageweg, "High Radix Addition Via Conditional Charge Transport in Single Electron Tunneling Technology," asap, pp.294-302, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05), 2005
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