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From Bit Level Systolic Arrays to HDTV Processor Chips
Steamboat Springs, Colorado, USA September 11-September 13
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2006.35IEEE 17th International Conference on ...
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John V McCanny, Queen?s University Belfast, Belfast, N Ireland
Roger F Woods, Queen?s University Belfast, Belfast, N Ireland
John G McWhirter, Qinetiq Ltd., St Andrews Rd Malvern Worcs. England
The paper starts presents the work initially carried out by Queen?s University and RSRE (now Qinetiq) in the development of advanced architectures and microchips based on systolic array architectures. The paper outlines how this has led to the development of highly complex designs for high definition TV and highlights work both on advanced signal processing architectures and tool flows for advanced systems.
Citation:
John V McCanny, Roger F Woods, John G McWhirter, "From Bit Level Systolic Arrays to HDTV Processor Chips," asap, pp.159-162, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), 2006
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