A Multi-Drop Transmission-Line Interconnect in Si LSI

Yokohama January 23-January 26

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http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.357969

2007 Asia and South Pacific Design Au ...

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	ASCII Text	x
	Junki Seita, Hiroyuki Ito, Kenichi Okada, Takashi Sato, Kazuya Masu, "A Multi-Drop Transmission-Line Interconnect in Si LSI," Asia and South Pacific Design Automation Conference, pp. 118-119, 2007 Asia and South Pacific Design Automation Conference, 2007.

	BibTex	x
	@article{ 10.1109/ASPDAC.2007.357969, author = {Junki Seita and Hiroyuki Ito and Kenichi Okada and Takashi Sato and Kazuya Masu}, title = {A Multi-Drop Transmission-Line Interconnect in Si LSI}, journal ={Asia and South Pacific Design Automation Conference}, volume = {0}, year = {2007}, isbn = {1-4244-0629-3}, pages = {118-119}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.357969}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asia and South Pacific Design Automation Conference TI - A Multi-Drop Transmission-Line Interconnect in Si LSI SN - 1-4244-0629-3 SP118 EP119 A1 - Junki Seita, A1 - Hiroyuki Ito, A1 - Kenichi Okada, A1 - Takashi Sato, A1 - Kazuya Masu, PY - 2007 KW - null VL - 0 JA - Asia and South Pacific Design Automation Conference ER -

Junki Seita, Integrated Research Institute, Tokyo Institute of Technology, 4259-R2-17 Nagatsuta, Midori-ku, Yokoh

Hiroyuki Ito, Integrated Research Institute, Tokyo Institute of Technology, 4259-R2-17 Nagatsuta, Midori-ku, Yokoh

Kenichi Okada, Integrated Research Institute, Tokyo Institute of Technology, 4259-R2-17 Nagatsuta, Midori-ku, Yokoh

Takashi Sato, Integrated Research Institute, Tokyo Institute of Technology, 4259-R2-17 Nagatsuta, Midori-ku, Yokoh

Kazuya Masu, Integrated Research Institute, Tokyo Institute of Technology, 4259-R2-17 Nagatsuta, Midori-ku, Yokoh

This paper proposes a branching method for on-chip transmission line (TL) interconnects, which can reduce delay and power of global interconnects. A 6-mm-long TL interconnect with a branch is fabricated by using a 0.18?m standard Si CMOS process, and the measurement result performs 4 Gbps signal transmission.

Citation:

Junki Seita, Hiroyuki Ito, Kenichi Okada, Takashi Sato, Kazuya Masu, "A Multi-Drop Transmission-Line Interconnect in Si LSI," asp-dac, pp.118-119, 2007 Asia and South Pacific Design Automation Conference, 2007

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