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Continuous-Time Digital Signal Processors
New York City, New York, USA March 14-March 16
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASYNC.2005.1511th IEEE International Symposium on ...
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Y. W. Li, K. L. Shepard, Y. P. Tsividis, "Continuous-Time Digital Signal Processors," Asynchronous Circuits and Systems, International Symposium on, pp. 138-143, 11th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'05), 2005.
 
 
BibTex
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@article{ 10.1109/ASYNC.2005.15,
author = {Y. W. Li and K. L. Shepard and Y. P. Tsividis},
title = {Continuous-Time Digital Signal Processors},
journal ={Asynchronous Circuits and Systems, International Symposium on},
volume = {0},
year = {2005},
issn = {1522-8681},
pages = {138-143},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASYNC.2005.15},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Asynchronous Circuits and Systems, International Symposium on
TI - Continuous-Time Digital Signal Processors
SN - 1522-8681
SP138
EP143
A1 - Y. W. Li,
A1 - K. L. Shepard,
A1 - Y. P. Tsividis,
PY - 2005
KW - null
VL - 0
JA - Asynchronous Circuits and Systems, International Symposium on
ER -
 
Y. W. Li, Columbia University
K. L. Shepard, Columbia University
Y. P. Tsividis, Columbia University
In this paper, we discuss how asynchronous design techniques can be used in the implementation of continuous-time signal processors. Such processors are presented by signals developed by continuous-time analog-to-digital converters which involve no sampling, and thus do not exhibit aliasing; in addition, the resulting in-band quantization error is lower than in conventional techniques. Several design considerations are given, and preliminary experimental results are presented.
Citation:
Y. W. Li, K. L. Shepard, Y. P. Tsividis, "Continuous-Time Digital Signal Processors," async, pp.138-143, 11th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'05), 2005
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