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A Transistor-Level Test Strategy for C^2MOS MOUSETRAP Asynchronous Pipelines
Grenoble, France March 13-March 15
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASYNC.2006.712th IEEE International Symposium on ...
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Feng Shi, Yale University
Yiorgos Makris, Yale University
We discuss a transistor-level test methodology for C2MOS asynchronous pipelines. Unlike their static CMOS counterparts, wherein testing for stuck-at faults and compliance to a few timing constraints typically suffices, dynamic asynchronous pipelines present new challenges which require more elaborate test solutions. More specifically, many gate-level input/output stuck-at faults of a static pipeline style translate into transistorlevel stuck-open/stuck-short faults in the dynamic C2MOS version. Therefore, test methods for transistor-level faults are required for dynamic asynchronous pipelines. To this end, we propose a methodology for testing both gate-level stuckat faults and transistor-level stuck-open/stuck-short faults in C2MOS pipelines. The proposed method does not employ additional hardware and is capable of detecting both gate-level and transistor-level faults, as we demonstrate on the C2MOS version of MOUSETRAP.
Citation:
Feng Shi, Yiorgos Makris, "A Transistor-Level Test Strategy for C^2MOS MOUSETRAP Asynchronous Pipelines," async, pp.57-67, 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'06), 2006
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