Circuit Independent Weighted Pseudo-Random BIST Pattern Generator

Calcutta, India December 18-December 21

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http://doi.ieeecomputersociety.org/10.1109/ATS.2005.37

14th Asian Test Symposium (ATS'05)

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	Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz, "Circuit Independent Weighted Pseudo-Random BIST Pattern Generator," Asian Test Symposium, pp. 132-137, 14th Asian Test Symposium (ATS'05), 2005.

	BibTex	x
	@article{ 10.1109/ATS.2005.37, author = {Chaowen Yu and Sudhakar M. Reddy and Irith Pomeranz}, title = {Circuit Independent Weighted Pseudo-Random BIST Pattern Generator}, journal ={Asian Test Symposium}, volume = {0}, year = {2005}, issn = {1081-7735}, pages = {132-137}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2005.37}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asian Test Symposium TI - Circuit Independent Weighted Pseudo-Random BIST Pattern Generator SN - 1081-7735 SP132 EP137 A1 - Chaowen Yu, A1 - Sudhakar M. Reddy, A1 - Irith Pomeranz, PY - 2005 KW - null VL - 0 JA - Asian Test Symposium ER -

Chaowen Yu, University of Iowa

Sudhakar M. Reddy, University of Iowa

Irith Pomeranz, Purdue University

This paper describes a circuit independent weighted pseudo random BIST pattern generator based on bit-flipping. The circuit dependent data is stored in memories so that different circuits can use the same BIST structure by only changing the data in the memories. New approaches are proposed for compressing and storing the bit-flipping data. Experimental results show that the proposed method reduces the size of the memory considerably while using similar test lengths as a recent method based on bit-fixing.

Citation:

Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz, "Circuit Independent Weighted Pseudo-Random BIST Pattern Generator," ats, pp.132-137, 14th Asian Test Symposium (ATS'05), 2005

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