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IEEE Std 1500 Compliant Infrastructure forModular SOC Testing
Calcutta, India December 18-December 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2005.6714th Asian Test Symposium (ATS'05)
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Tom Waayers, Erik Jan Marinissen, Maurice Lousberg, "IEEE Std 1500 Compliant Infrastructure forModular SOC Testing," Asian Test Symposium, pp. 450, 14th Asian Test Symposium (ATS'05), 2005.
 
 
BibTex
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@article{ 10.1109/ATS.2005.67,
author = {Tom Waayers and Erik Jan Marinissen and Maurice Lousberg},
title = {IEEE Std 1500 Compliant Infrastructure forModular SOC Testing},
journal ={Asian Test Symposium},
volume = {0},
year = {2005},
issn = {1081-7735},
pages = {450},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2005.67},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - IEEE Std 1500 Compliant Infrastructure forModular SOC Testing
SN - 1081-7735
SP
EP
A1 - Tom Waayers,
A1 - Erik Jan Marinissen,
A1 - Maurice Lousberg,
PY - 2005
KW - null
VL - 0
JA - Asian Test Symposium
ER -
 
Tom Waayers, Philips Research Laboratories, The Netherlands
Erik Jan Marinissen, Philips Research Laboratories, The Netherlands
Maurice Lousberg, Philips Research Laboratories, The Netherlands
Modern semiconductor process technologies enable the manufacturing of a complete system on one single die, the so-called system-on-chip or SOC. Building those chips in a timely and cost-effective manner is amongst others realized by embedding third-party IP cores. Due to imperfections in silicon manufacturing, an SOC including all its embedded modules needs to be tested for manufacturing defects.
Citation:
Tom Waayers, Erik Jan Marinissen, Maurice Lousberg, "IEEE Std 1500 Compliant Infrastructure forModular SOC Testing," ats, pp.450, 14th Asian Test Symposium (ATS'05), 2005
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