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New Self-checking Output-Duplicated Booth Multiplier with High Fault Coverage for Soft Errors
Calcutta, India December 18-December 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2005.8014th Asian Test Symposium (ATS'05)
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D. Marienfeld, University of Potsdam, Germany
E. S. Sogomonyan, University of Potsdam, Germany
V. Ocheretnij, University of Potsdam, Germany
M. Gossel, University of Potsdam, Germany
In this paper a new self-checking code-disjoint Booth-2 multiplier with an improved error detection and with a reduced area overhead is proposed. Compared to the 64?64 multiplier without error detection the area for the proposed multiplier increases for the different implementations only by 23%-30%. Especially for soft errors the error detection capability is significantly improved. All even or odd (soft) errors in the output registers are detected.
Citation:
D. Marienfeld, E. S. Sogomonyan, V. Ocheretnij, M. Gossel, "New Self-checking Output-Duplicated Booth Multiplier with High Fault Coverage for Soft Errors," ats, pp.76-81, 14th Asian Test Symposium (ATS'05), 2005
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