loading...
Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications
Munich, Germany March 07-March 11
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2005.219Design, Automation and Test in Europe ...
 This Article 
 
PURCHASE ARTICLE: $0
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Domenico Barretta, Politecnico di Milano
William Fornaciari, Politecnico di Milano
Mariagiovanna Sami, Politecnico di Milano
Daniele Bagni, STMicroelectronics
Instruction Level Parallelism (ILP) extraction for multi-cluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and thread level parallelism jointly, thus allowing an easier parallelism extraction and improving the performance with respect to traditional multicluster VLIW processors.
Citation:
Domenico Barretta, William Fornaciari, Mariagiovanna Sami, Daniele Bagni, "Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications," date, vol. 2, pp.748-749, Design, Automation and Test in Europe (DATE'05) Volume 2, 2005
Usage of this product signifies your acceptance of the Terms of Use.