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Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions
Munich, Germany March 07-March 11
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2005.238Design, Automation and Test in Europe ...
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Ajith Chandy, Colorado State University, USA
Tom Chen, Colorado State University, USA
We propose a sensitivity-based method to allocate decaps incorporating leakage constraints and tighter data and clock interactions. The proposed approach attempts to allocate decaps not only based on the power grid integrity criteria, but also based on the impact of power grid noise on timing criticality and robustness. The resulting algorithm reduces the power grid noise to below a threshold and improves the performance or timing robustness of the circuit at the same time.
Citation:
Ajith Chandy, Tom Chen, "Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions," date, vol. 2, pp.984-985, Design, Automation and Test in Europe (DATE'05) Volume 2, 2005
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