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Built-In Self-Test for Flash Memory Embedded in SoC
Kuala Lumpur, Malaysia January 17-January 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.19Third IEEE International Workshop on ...
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Shibaji Banerjee, Indian Institute of Technology, India
Dipanwita Roy Chowdhury, Indian Institute of Technology, India
Flash memories are a type of non-volatile memory, which are becoming more and more popular for System-on- Chip. But, flash memories are suffered by different types of disturb faults. In the present paper, some new disturb faults that may appear in flash memory are proposed. A modifies March algorithm is developed to detect these faults. Finally, an embedded processor-based Built-In Self-Test (BIST) design is implemented for embedded memories. The proposed method utilizes the concept of reusing the processor in SoC environment. By reusing the embedded processor, the area overhead due to BIST can be reduced to a great extent. The area overhead is only due to the circuits required to design memory wrapper cell. The experimental results show that the area overhead due to BIST is less than 1% for a typical 256K flash memory.
Citation:
Shibaji Banerjee, Dipanwita Roy Chowdhury, "Built-In Self-Test for Flash Memory Embedded in SoC," delta, pp.379-384, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006
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