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Electrical Behavior of GOS Fault affected Domino Logic Cell
Kuala Lumpur, Malaysia January 17-January 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.42Third IEEE International Workshop on ...
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M. Comte, Nara Institute of Science and Technology (NAIST), Japan
S. Ohtake, Nara Institute of Science and Technology (NAIST), Japan
H. Fujiwara, Nara Institute of Science and Technology (NAIST), Japan
M. Renovell, LIRMM, France
Gate-Oxide Shorts (GOS) have an increasing impact on the integrated circuit production yield due to the reduction of the related dimensions. The detection of GOS is a challenging issue in the field of testing. This paper presents a detailed study of the impact of a GOS fault affecting a Domino logic circuit. Indeed, Domino logic specific clocked operating principle induces a different behavior from standard full CMOS cells under the effect of a GOS, which can enable GOS detection. Finally, some clues to enhance GOS detection in Domino cells are proposed.
Index Terms:
Domino logic; Gate-Oxide Short (GOS); Defect modeling; Electrical analysis Boolean test.
Citation:
M. Comte, S. Ohtake, H. Fujiwara, M. Renovell, "Electrical Behavior of GOS Fault affected Domino Logic Cell," delta, pp.183-189, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006
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