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Some Common Aspects of Design Validation,Debug and Diagnosis
Kuala Lumpur, Malaysia January 17-January 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.79Third IEEE International Workshop on ...
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Talal Arnaout, Universitat Stuttgart, Germany
Gunter Bartsch, Universitat Stuttgart, Germany
Hans-Joachim Wunderlich, Universitat Stuttgart, Germany
Design, Verification and Test of integrated circuits with millions of gates put strong requirements on design time, test volume, test application time, test speed and diagnostic resolution. In this paper, an overview is given on the common aspects of these tasks and how they interact. Diagnosis techniques may be used after manufacturing, for chip characterization and field return analysis, and even for rapid prototyping.
Citation:
Talal Arnaout, Gunter Bartsch, Hans-Joachim Wunderlich, "Some Common Aspects of Design Validation,Debug and Diagnosis," delta, pp.3-10, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006
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