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The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique
Kuala Lumpur, Malaysia January 17-January 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.87Third IEEE International Workshop on ...
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Jiri Haze, Radimir Vrba, "The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique," Electronic Design, Test and Applications, IEEE International Workshop on, pp. 340-344, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006.
 
 
BibTex
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@article{ 10.1109/DELTA.2006.87,
author = {Jiri Haze and Radimir Vrba},
title = {The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique},
journal ={Electronic Design, Test and Applications, IEEE International Workshop on},
volume = {0},
year = {2006},
isbn = {0-7695-2500-8},
pages = {340-344},
doi = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.87},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Electronic Design, Test and Applications, IEEE International Workshop on
TI - The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique
SN - 0-7695-2500-8
SP340
EP344
A1 - Jiri Haze,
A1 - Radimir Vrba,
PY - 2006
KW - null
VL - 0
JA - Electronic Design, Test and Applications, IEEE International Workshop on
ER -
 
Jiri Haze, Brno University of Technology, Czech Republic
Radimir Vrba, Brno University of Technology, Czech Republic

The paper deals with new background calibration technique, which is utilized in new 10-bit low power pipelined ADC. The switched-capacitor approach is used in designed ADC as well.

Since portable applications demand for low power consumption, it is one of the most important issues considered in the design. A modified operationalamplifier (op-amp) sharing technique was used to decrease the power usage as well as capacitor scaling approach. To avoid the clock feedthrough from digital part through the switches, the fully differential circuitry was utilized. The operational transkonductance amplifier (OTA) was used in design instead of op-amp. The power consumption of the OTA and other analog parts were taken into account in design procedure.

The finite op-amp dc gain problem is solved in digital-domain using background calibration. The capacitor mismatch and op-amp offset are compensated in the same manner.

Citation:
Jiri Haze, Radimir Vrba, "The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique," delta, pp.340-344, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006
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