Improving Diagnosis Resolution without Physical Information

January 23-January 25

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http://doi.ieeecomputersociety.org/10.1109/DELTA.2008.37

4th IEEE International Symposium on E ...

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	Similar Articles Articles by A. Rousset Articles by A. Bosio Articles by P. Girard Articles by C. Landrault Articles by S. Pravossoudovitch Articles by A. Virazel

	ASCII Text	x
	A. Rousset, A. Bosio, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel, "Improving Diagnosis Resolution without Physical Information," Electronic Design, Test and Applications, IEEE International Workshop on, pp. 210-215, 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008), 2008.

	BibTex	x
	@article{ 10.1109/DELTA.2008.37, author = {A. Rousset and A. Bosio and P. Girard and C. Landrault and S. Pravossoudovitch and A. Virazel}, title = {Improving Diagnosis Resolution without Physical Information}, journal ={Electronic Design, Test and Applications, IEEE International Workshop on}, volume = {0}, year = {2008}, isbn = {978-0-7695-3110-6}, pages = {210-215}, doi = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2008.37}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Electronic Design, Test and Applications, IEEE International Workshop on TI - Improving Diagnosis Resolution without Physical Information SN - 978-0-7695-3110-6 SP210 EP215 A1 - A. Rousset, A1 - A. Bosio, A1 - P. Girard, A1 - C. Landrault, A1 - S. Pravossoudovitch, A1 - A. Virazel, PY - 2008 KW - Logic Diagnosis KW - Path Tracing KW - Fault Modeling VL - 0 JA - Electronic Design, Test and Applications, IEEE International Workshop on ER -

This paper presents an extended version of a diagnosis method proposed so far, that considers only the logic information provided by the tester to achieve diagnosis results. The main advantage of the proposed method is its capability to handle several fault models at the same time, e.g., static, dynamic, at transistor level, thus setting up a unified framework for logic diagnosis. Experiments on ITC'99 benchmark circuits show the efficiency of the proposed method both in terms of diagnosis resolution and required CPU time.

Index Terms:

Logic Diagnosis, Path Tracing, Fault Modeling

Citation:

A. Rousset, A. Bosio, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel, "Improving Diagnosis Resolution without Physical Information," delta, pp.210-215, 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008), 2008

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