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Test Set Stripping Limiting the Maximum Number of Specified Bits
January 23-January 25
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2008.644th IEEE International Symposium on E ...
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This paper presents a technique that limits the maximum number of specified bits of any pattern in a given test set. The outlined method uses algorithms similar to ATPG, but exploits the information in the test set to quickly find test patterns with the desired properties. The resulting test sets show a significant reduction in the maximum number of specified bits in the test patterns. Furthermore, for commercial ATPG test sets even the overall number of specified bits is reduced substantially.
Index Terms:
Test relaxation, test generation, tailored ATPG
Citation:
Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Hans-Joachim Wunderlich, "Test Set Stripping Limiting the Maximum Number of Specified Bits," delta, pp.581-586, 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008), 2008
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