Janusz Biernat,
"Self-Dual Modules in Design of Dependable Digital Devices,"
Dependability of Computer Systems, International Conference on, pp. 276-281, International Conference on Dependability of Computer Systems (DEPCOS-RELCOMEX'06), 2006.
BibTex
x
@article{
10.1109/DEPCOS-RELCOMEX.2006.50, author = {Janusz Biernat}, title = {Self-Dual Modules in Design of Dependable Digital Devices}, journal ={Dependability of Computer Systems, International Conference on}, volume = {0}, year = {2006}, isbn = {0-7695-2565-2}, pages = {276-281}, doi = {http://doi.ieeecomputersociety.org/10.1109/DEPCOS-RELCOMEX.2006.50}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }
RefWorks Procite/RefMan/Endnote
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TY - CONF JO - Dependability of Computer Systems, International Conference on TI - Self-Dual Modules in Design of Dependable Digital Devices SN - 0-7695-2565-2 SP276 EP281 A1 - Janusz Biernat, PY - 2006 KW - null VL - 0 JA - Dependability of Computer Systems, International Conference on ER -
The class of self-dual logic circuits is analyzed. It is shown, that self-duality is the feature of a numerous arithmetic circuits, like elementary 1-bit adder, standard binary and 2?s complement adders and a class of modulo adders.
Citation:
Janusz Biernat, "Self-Dual Modules in Design of Dependable Digital Devices," depcos-relcomex, pp.276-281, International Conference on Dependability of Computer Systems (DEPCOS-RELCOMEX'06), 2006
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