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An Efficient Scan Chain Partitioning Scheme with Reduction of Test Data under Routing Constraint
Arlington, Virginia, USA October 04-October 06
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2006.1421st IEEE International Symposium on ...
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Geewhun Seok, Il-Soo Lee, Tony Ambler, B. F. Womack, "An Efficient Scan Chain Partitioning Scheme with Reduction of Test Data under Routing Constraint," Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on, pp. 145-156, 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06), 2006.
 
 
BibTex
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@article{ 10.1109/DFT.2006.14,
author = {Geewhun Seok and Il-Soo Lee and Tony Ambler and B. F. Womack},
title = {An Efficient Scan Chain Partitioning Scheme with Reduction of Test Data under Routing Constraint},
journal ={Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on},
volume = {0},
year = {2006},
issn = {1550-5774},
pages = {145-156},
doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2006.14},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
TI - An Efficient Scan Chain Partitioning Scheme with Reduction of Test Data under Routing Constraint
SN - 1550-5774
SP145
EP156
A1 - Geewhun Seok,
A1 - Il-Soo Lee,
A1 - Tony Ambler,
A1 - B. F. Womack,
PY - 2006
KW - null
VL - 0
JA - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
ER -
 
Geewhun Seok, University of Texas at Austin, USA
Il-Soo Lee, University of Texas at Austin, USA
Tony Ambler, University of Texas at Austin, USA
B. F. Womack, University of Texas at Austin, USA
A proposed scan chain partitioning scheme considers reduction of test set and test time, and the optimal routing inside each partitioned scan chain. First, two compatible scan cells are searched in input test set. One group of compatible scan cells is included in one partitioned scan chain, while the other group is in the other scan chain. In finding these compatible scan cells, the group-based approach is employed since it provides more optimal routing solution among the compatible scan cells in each of these two scan chains. After these two scan chains are filled with compatible scan cells, they will be able to share one of two compatible columns in input test set only during the shift-in process. Therefore, one of two compatible columns can be omitted from input test set and the scan operation. Results with ISCAS?89 benchmark circuits show that proposed method could reduce test data volume by 25-33% compared with a normal multiple scan design.
Citation:
Geewhun Seok, Il-Soo Lee, Tony Ambler, B. F. Womack, "An Efficient Scan Chain Partitioning Scheme with Reduction of Test Data under Routing Constraint," dft, pp.145-156, 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06), 2006
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