Data Dependent Jitter Characterization Based on Fourier Analysis

Arlington, Virginia, USA October 04-October 06

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http://doi.ieeecomputersociety.org/10.1109/DFT.2006.19

21st IEEE International Symposium on ...

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	Di Mu, Tian Xia, Hao Zheng, "Data Dependent Jitter Characterization Based on Fourier Analysis," Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on, pp. 534-544, 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06), 2006.

	BibTex	x
	@article{ 10.1109/DFT.2006.19, author = {Di Mu and Tian Xia and Hao Zheng}, title = {Data Dependent Jitter Characterization Based on Fourier Analysis}, journal ={Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on}, volume = {0}, year = {2006}, issn = {1550-5774}, pages = {534-544}, doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2006.19}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on TI - Data Dependent Jitter Characterization Based on Fourier Analysis SN - 1550-5774 SP534 EP544 A1 - Di Mu, A1 - Tian Xia, A1 - Hao Zheng, PY - 2006 KW - null VL - 0 JA - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on ER -

Di Mu, University of Vermont, USA

Tian Xia, University of Vermont, USA

Hao Zheng, Univerisity of South Florida, USA

In this paper, we focus on modeling the data dependent jitter (DDJ) in high-speed interconnect. To investigate the data dependent jitter, the analysis is performed with Fourier series based on the interconnect RLC model. By calculating the pattern dependent delay deviation, the data dependent jitter is characterized. To validate the modeling accuracy, the analysis results have been compared against the Cadence simulations.

Citation:

Di Mu, Tian Xia, Hao Zheng, "Data Dependent Jitter Characterization Based on Fourier Analysis," dft, pp.534-544, 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06), 2006

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