loading...
Defect Characterization and Tolerance of QCA Sequential Devices and Circuits
Monterey, California October 03-October 05
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFTVS.2005.2620th IEEE International Symposium on ...
 This Article 
 
Buy PURCHASE ARTICLE: $19
PDF
HTML
Buy IEEE Xplore Subscribers
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
ASCII Text
x 
 
M. Momenzadeh, J. Huang, F. Lombardi, "Defect Characterization and Tolerance of QCA Sequential Devices and Circuits," Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on, pp. 199-207, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05), 2005.
 
 
BibTex
x
 
@article{ 10.1109/DFTVS.2005.26,
author = {M. Momenzadeh and J. Huang and F. Lombardi},
title = {Defect Characterization and Tolerance of QCA Sequential Devices and Circuits},
journal ={Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on},
volume = {0},
year = {2005},
isbn = {0-7695-2464-8},
pages = {199-207},
doi = {http://doi.ieeecomputersociety.org/10.1109/DFTVS.2005.26},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
TI - Defect Characterization and Tolerance of QCA Sequential Devices and Circuits
SN - 0-7695-2464-8
SP199
EP207
A1 - M. Momenzadeh,
A1 - J. Huang,
A1 - F. Lombardi,
PY - 2005
KW - null
VL - 0
JA - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
ER -
 
M. Momenzadeh, Northeastern University
J. Huang, Northeastern University
F. Lombardi, Northeastern University

This paper analyzes the defect tolerance of sequential devices and circuits implemented by molecular Quantum-dot Cellular Automata (QCA). Initially, a novel QCA SR-type flip-flop is proposed; this flip-flop is the first sequential device for QCA and it takes into account the timing issues associated with the adiabatic switching of this technology. Using a defect model by which single additional and missing cells are considered in a molecular implementation, simulation results are provided for a logic-level characterization of the defects. Also for sequential circuits, defect tolerance is pursued and shown to affect the functionality of basic QCA devices, resulting mostly in unwanted inversion and stuck-at faulty behavior at logic level.

Citation:
M. Momenzadeh, J. Huang, F. Lombardi, "Defect Characterization and Tolerance of QCA Sequential Devices and Circuits," dft, pp.199-207, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.