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Improving Transition Delay Fault Coverage Using Hybrid Scan-Based Technique
Monterey, California October 03-October 05
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFTVS.2005.6920th IEEE International Symposium on ...
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Nisar Ahmed, ASIC Product Development Center, Texas Instruments India
Mohammad Tehranipoor, Univ. of Maryland Baltimore

This paper presents a hybrid scan-based transition delay fault test. The proposed technique controls a small subset of scan cells by launch-off-shift method and the rest by launch-off-capture method. An efficient ATPG-based controllability measurement approach is proposed to select the scan cells to be controlled by launch-off-shift or launch-off-capture. In this technique, local scan enable signals are generated on-chip using two local scan enable generator cells. The cells can be inserted anywhere in a scan chain and the area overhead is negligible. The launch and capture information of scan enable signals are transferred into the scan chain during scan-in process. Our technique improves the fault coverage and reduces the pattern count and the scan enable design effort. The proposed hybrid technique is practice-oriented and implemented using current commercial ATPG tools.

Citation:
Nisar Ahmed, Mohammad Tehranipoor, "Improving Transition Delay Fault Coverage Using Hybrid Scan-Based Technique," dft, pp.187-198, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05), 2005
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