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Integration of Instruction Set Simulators into SystemC High Level Models
Dortmund, Germany September 04-September 06
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DSD.2002.1115360Euromicro Symposium on Digital System ...
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Ilia Oussorov, Infineon Technologies AG
Wolfgang Raab, Infineon Technologies AG
Ulrich Hachmann, Infineon Technologies AG
Alex Kravtsov, Infineon Technologies AG
This paper discusses the integration of instruction set simulators (ISS) for processor cores into high-level system models. The approaches to providing data communication between high level modules and ISS are addressed as well as the synchronization between these parts.
Index Terms:
hardware/software codesign, SystemC, high level modeling, gradual refinement
Citation:
Ilia Oussorov, Wolfgang Raab, Ulrich Hachmann, Alex Kravtsov, "Integration of Instruction Set Simulators into SystemC High Level Models," dsd, pp.126, Euromicro Symposium on Digital System Design (DSD'02), 2002
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