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Workshop on Dependable and Secure Nanocomputing
Edinburgh, UK June 25-June 28
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DSN.2007.10637th Annual IEEE/IFIP International C ...
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Jean Arlat, University of Toulouse, France
Ravishankar K. Iyer, Coordinated Science Laboratory, USA
Michael Nicolaidis, TIMA and iRoc Technologies, France
The continuous advances and progress made in hardware technology makes it possible to foresee a realm of unprecedented performance levels and new application-driven architectural designs, as evidenced by the recent announcement of a 80-core chip [1]. Nevertheless, the evolution of nanotechnologies raises serious challenges with respect to both dependability and security viewpoints. Issues at stake go far beyond developing protections with respect to accidental disturbances in operation, they also relate to the unreliability and variability that will characterize emerging nanoscale devices. Accounting for malicious threats targeting hardware circuits will constitute another increasing concern.
Citation:
Jean Arlat, Ravishankar K. Iyer, Michael Nicolaidis, "Workshop on Dependable and Secure Nanocomputing," dsn, pp.809-810, 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07), 2007
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