loading...
Enhancing Delay Fault Coverage through Low Power Segmented Scan
Southampton, United Kingdom May 21-May 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ETS.2006.18Eleventh IEEE European Test Symposium ...
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Zhuo Zhang, University of Iowa, USA
Sudhakar M. Reddy, University of Iowa, USA
Irith Pomeranz2, Pomeranz, Purdue University, USA
Janusz Rajski, Mentor Graphics Corp., USA
Bashir M. Al-Hashimi, University of Southampton, UK
Reducing power dissipation during test has been an active area of academic and industrial research for the last few years and numerous low power DFT techniques and test generation procedures have been proposed. Segmented scan [17-20] has been shown to be an effective technique in addressing test power issues in industrial designs [18]. To achieve higher shipped product quality, tests for delay faults are becoming essential components of manufacturing test. This paper demonstrates, for the first time, that segmented scan facilitates increased delay fault coverage without degrading the reduction of the switching activity obtained by segmented scan. The increased transition delay fault coverage is achieved through careful selection of the capture cycle application. Experimental results on larger ISCAS-89 benchmarks show that using three segments, on average, fault coverage using launch off capture can be increased by about 5.4% while simultaneously reducing the peak switching activity caused by capture cycles by over 30%.
Citation:
Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz2, Pomeranz, Janusz Rajski, Bashir M. Al-Hashimi, "Enhancing Delay Fault Coverage through Low Power Segmented Scan," ets, pp.21-28, Eleventh IEEE European Test Symposium (ETS'06), 2006
Usage of this product signifies your acceptance of the Terms of Use.