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Soft-Error Rate Testing of Deep-Submicron Integrated Circuits
Southampton, United Kingdom May 21-May 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ETS.2006.42Eleventh IEEE European Test Symposium ...
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Tino Heijmen, Andr? Nieuwland, "Soft-Error Rate Testing of Deep-Submicron Integrated Circuits," European Test Symposium, IEEE, pp. 247-252, Eleventh IEEE European Test Symposium (ETS'06), 2006.
 
 
BibTex
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@article{ 10.1109/ETS.2006.42,
author = {Tino Heijmen and Andr? Nieuwland},
title = {Soft-Error Rate Testing of Deep-Submicron Integrated Circuits},
journal ={European Test Symposium, IEEE},
volume = {0},
year = {2006},
issn = {1530-1877},
pages = {247-252},
doi = {http://doi.ieeecomputersociety.org/10.1109/ETS.2006.42},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - European Test Symposium, IEEE
TI - Soft-Error Rate Testing of Deep-Submicron Integrated Circuits
SN - 1530-1877
SP247
EP252
A1 - Tino Heijmen,
A1 - Andr? Nieuwland,
PY - 2006
KW - null
VL - 0
JA - European Test Symposium, IEEE
ER -
 
Tino Heijmen, Philips Research Laboratories, The Netherlands
Andr? Nieuwland, Philips Research Laboratories, The Netherlands
Soft errors induced by radiation pose a major challenge for the reliability of complex chips processed in state-of-the-art technologies. This paper reviews soft-error rate (SER) characterization by realtime system-SER testing and by accelerated testing. Additionally, we present scaling trends, simulation approaches, and improvement techniques. Special attention is given to soft errors in combinational logic.
Citation:
Tino Heijmen, Andr? Nieuwland, "Soft-Error Rate Testing of Deep-Submicron Integrated Circuits," ets, pp.247-252, Eleventh IEEE European Test Symposium (ETS'06), 2006
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