An otherwise well-known ratiometric Built-In Current Sensor (BICS) dedicated to monitor the current of analog and mixed-signal building blocks highlights a dependency with regards to technology discrepancy. In this paper we present a design methodology that allows to dramatically reduce the dependency, yielding to a new version of this BICS. Taking advantage of a 130 nm VLSI CMOS technology, the BICS proposed has a peak-to-peak dispersion lower than 10 % of its output full-scale range. It makes it more suitable to implement the test functionality while maintaining the initial BICS intrinsic performances. The built-in self test methodology is illustrated by monitoring the supply current of a Low-Noise Amplifier (LNA). Measurements confirm the BICS?s low sensitivity to process variations and its transparency relative to the circuit under test (CUT).