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The GAPLA: A Globally Asynchronous Locally Synchronous FPGA Architecture
Los Alamitos April 18-April 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2005.6413th Annual IEEE Symposium on Field-P ...
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Xin Jia, Ranga Vemuri, "The GAPLA: A Globally Asynchronous Locally Synchronous FPGA Architecture," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 291-292, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05), 2005.
 
 
BibTex
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@article{ 10.1109/FCCM.2005.64,
author = {Xin Jia and Ranga Vemuri},
title = {The GAPLA: A Globally Asynchronous Locally Synchronous FPGA Architecture},
journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on},
volume = {0},
year = {2005},
isbn = {0-7695-2445-1},
pages = {291-292},
doi = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2005.64},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
TI - The GAPLA: A Globally Asynchronous Locally Synchronous FPGA Architecture
SN - 0-7695-2445-1
SP291
EP292
A1 - Xin Jia,
A1 - Ranga Vemuri,
PY - 2005
KW - null
VL - 0
JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
ER -
 
Xin Jia, University of Cincinnati
Ranga Vemuri, University of Cincinnati
This paper proposes GAPLA: a Globally Asynchronous Locally Synchronous Programmable Logic Array architecture. The whole FPGA area is divided into locally synchronous blocks wrapped with asynchronous I/O interfaces. Data communications between synchronous blocks are controlled by 2-phase handshaking signals. The size and shape of each locally synchronous block are programmable so that different modules in a design can be effectively implemented. Each block could run at higher speed because only the fast local interconnections are used. Experimental results show an up to 28% performance improvement compared to the conventional FPGAs with small area overhead (around 2%).
Citation:
Xin Jia, Ranga Vemuri, "The GAPLA: A Globally Asynchronous Locally Synchronous FPGA Architecture," fccm, pp.291-292, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05), 2005
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