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A Scalable FPGA-based Multiprocessor
Napa, California April 24-April 26
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2006.1714th Annual IEEE Symposium on Field-P ...
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Arun Patel, University of Toronto, Toronto, ON, Canada
Christopher A. Madill, University of Toronto, Toronto, ON, Canada
Manuel Saldana, University of Toronto, Toronto, ON, Canada
Christopher Comis, University of Toronto, Toronto, ON, Canada
Regis Pomes, University of Toronto, Toronto, ON, Canada
Paul Chow, University of Toronto, Toronto, ON, Canada

It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive large-scale computing applications, such as molecular dynamics simulations of biological systems, underscore the need for even greater speedups to address relevant length and time scales.

In this work, we propose an architecture for a scalable computing machine built entirely using FPGA computing nodes. The machine enables designers to implement largescale computing applications using a heterogeneous combination of hardware accelerators and embedded microprocessors spread across many FPGAs, all interconnected by a flexible communication network. Parallelism at multiple levels of granularity within an application can be exploited to obtain the maximum computational throughput. By focusing on applications that exhibit a high computation-tocommunication ratio, we narrow the extent of this investigation to the development of a suitable communication infrastructure for our machine, as well as an appropriate programming model and design flow for implementing applications.

By providing a simple, abstracted communication interface with the objective of being able to scale to thousands of FPGA nodes, the proposed architecture appears to the programmer as a unified, extensible FPGA fabric. A programming model based on the MPI message-passing standard is also presented as a means for partitioning an application into independent computing tasks that can be implemented on our architecture. Finally, we demonstrate the first use of our design flow by developing a simple molecular dynamics simulation application for the proposed machine, which runs on a small platform of development boards.

Citation:
Arun Patel, Christopher A. Madill, Manuel Saldana, Christopher Comis, Regis Pomes, Paul Chow, "A Scalable FPGA-based Multiprocessor," fccm, pp.111-120, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006
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