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Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions
Napa, California April 24-April 26
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2006.2814th Annual IEEE Symposium on Field-P ...
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David Lau, Orion Pritchard, Philippe Molson, "Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 45-56, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006.
 
 
BibTex
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@article{ 10.1109/FCCM.2006.28,
author = {David Lau and Orion Pritchard and Philippe Molson},
title = {Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions},
journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on},
volume = {0},
year = {2006},
isbn = {0-7695-2661-6},
pages = {45-56},
doi = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2006.28},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
TI - Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions
SN - 0-7695-2661-6
SP45
EP56
A1 - David Lau,
A1 - Orion Pritchard,
A1 - Philippe Molson,
PY - 2006
KW - null
VL - 0
JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
ER -
 
David Lau, Altera Santa Cruz
Orion Pritchard, Altera Santa Cruz
Philippe Molson, Altera Santa Cruz

Methodologies for synthesis of stand-alone hardware modules from C/C++ based languages have been gaining adoption for embedded system design, as an essential means to stay ahead of increasing performance, complexity, and time-to-market demands. However, using C to generate stand-alone blocks does not allow for truly seamless unification of embedded software and hardware development flows.

This paper describes a methodology for generating hardware accelerator modules that are tightly coupled with a soft RISC CPU, its tool chain, and its memory system. This coupling allows for several significant advancements: (1) a unified development environment with true pushbutton switching between original software and hardwareaccelerated implementations, (2) direct access to memory from the accelerator module, (3) full support for pointers and arrays, and (4) latency-aware pipelining of memory transactions.

We also present results of our implementation, the C2H Compiler. Eight user test cases on common embedded applications show speedup factors of 13x-73x achieved in less than a few days.

Citation:
David Lau, Orion Pritchard, Philippe Molson, "Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions," fccm, pp.45-56, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006
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