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Teramac-configurable custom computing
Napa Valley, California April 19-April 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1995.477406IEEE Symposium on FPGA's for Custom C ...
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R. Amerson, Hewlett-Packard Co., Palo Alto, CA, USA
R.J. Carter, Hewlett-Packard Co., Palo Alto, CA, USA
W.B. Culbertson, Hewlett-Packard Co., Palo Alto, CA, USA
P. Kuekes, Hewlett-Packard Co., Palo Alto, CA, USA
G. Snider, Hewlett-Packard Co., Palo Alto, CA, USA
Abstract: The Teramac configurable hardware system can execute synchronous logic designs of up to one million gates at rates up to 1 megahertz. A fully configured Teramac includes half a gigabyte of RAM and hardware support for large multiported register files. The system has been built from custom FPGA's packaged in large multichip modules (MCMs). A large custom circuit (/spl sim/1,000,000 gates) may be compiled onto the hardware in approximately 2 hours, without user intervention. The system is being used to explore the potential of custom computing machinery (CCM).
Index Terms:
computer architecture; field programmable gate arrays; multichip modules; application specific integrated circuits; Teramac configurable hardware system; configurable custom computing; synchronous logic designs; fully configured Teramac; RAM; hardware support; large multiported register files; large multichip modules; large custom circuit; custom computing machinery; CCM
Citation:
R. Amerson, R.J. Carter, W.B. Culbertson, P. Kuekes, G. Snider, "Teramac-configurable custom computing," fccm, pp.0032, IEEE Symposium on FPGA's for Custom Computing Machines (FCCM '95), 1995
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