loading...
Laser defect correction applications to FPGA based custom computers
Napa Valley, CA April 16-April 18
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.6246265th IEEE Symposium on FPGA-Based Cust ...
 This Article 
 
PURCHASE ARTICLE: $0
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
G.H. Chapman, Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
B. Dufort, Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
The complexity and speed of monolithic FPGA based custom computers has been set by the presence of defective sections which limit chip area. Test FPGAs show that laser link defect avoidance routing around flawed blocks generates delays
Index Terms:
field programmable gate arrays; laser defect correction applications; defective sections; complexity; speed; monolithic FPGA based custom computers; chip area; test FPGAs; laser link defect avoidance routing; flawed blocks; delays; active switches; error cell distribution
Citation:
G.H. Chapman, B. Dufort, "Laser defect correction applications to FPGA based custom computers," fccm, pp.240, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997
Usage of this product signifies your acceptance of the Terms of Use.