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Mapping a real-time video algorithm to a context-switched FPGA
Napa Valley, CA April 16-April 18
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.6253665th IEEE Symposium on FPGA-Based Cust ...
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S. Kelem, "Mapping a real-time video algorithm to a context-switched FPGA," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 236, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997.
 
 
BibTex
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@article{ 10.1109/FPGA.1997.625366,
author = {S. Kelem},
title = {Mapping a real-time video algorithm to a context-switched FPGA},
journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on},
volume = {0},
year = {1997},
issn = {1082-3409},
pages = {236},
doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.625366},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
TI - Mapping a real-time video algorithm to a context-switched FPGA
SN - 1082-3409
SP
EP
A1 - S. Kelem,
PY - 1997
KW - field programmable gate arrays; context-switched FPGA; real-time video algorithm; Xilinx XC4000E; state saving; time-multiplexing; configuration planes; context-switching; end-user; CLB architecture
VL - 0
JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
ER -
 
S. Kelem, Xilinx Inc., San Jose, CA, USA
This paper describes the implementation of a real-time video algorithm on a context-switched FPGA. The FPGA is based on the Xilinx XC4000E FPGA, and includes extensions for dealing with state saving and forwarding and for increased routing demand due to time-multiplexing the hardware. The algorithm makes use of special features of this architecture to achieve high utilization of the silicon at run time. Two configuration planes are programmed as distributed RAM and two planes perform replications of the calculation in parallel. The interplay between the CLB architecture, communication between configuration planes, context-switching overhead, and the end-user application are examined as we map the algorithm onto this architecture.
Index Terms:
field programmable gate arrays; context-switched FPGA; real-time video algorithm; Xilinx XC4000E; state saving; time-multiplexing; configuration planes; context-switching; end-user; CLB architecture
Citation:
S. Kelem, "Mapping a real-time video algorithm to a context-switched FPGA," fccm, pp.236, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997
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